Oracle Magazine: SPARC at 25



[SPARC International Inc. Member logo, courtesy Aurora VLSI]

Abstract:
The SPARC architecture is perhaps the first and longest lasting open and mainstram computing architecture in human history. In Ocrober  2012, Network Management published a reminder for people to attend the "SPARC at 25" event at the Computer History Museum. In November of 2012, Network Management published an short article pointing to the replay of the historic events: SPARC at 25: Past, Present, and Future. Diana Reichardt published an article "SPARC at 25" in the bi-monthly printed Oracle Magazine, covering the event.

[SPARC International, Inc. logo, courtesy sparc.org]

Why SPARC?

Diana opens her article, regarding the event at the Computer History Museum, with the following question, "Why SPARC?" The article continues, with the following opening paragraph.

In 1987, a small startup called Sun Microsystems developed its own microprocessor, called SPARC, and introduced the Sun-4, the first computer based on the new chip. On November 1, 2012, many early SPARC team members, along with Oracle President Mark Hurd and Executive Vice President of Systems at Oracle John Fowler, convened at the Computer History Museum in Mountain View, California, for SPARC at 25: Past, Present, and Future. This event provided a look back at the history of SPARC and the early days of Sun. Stories from the participants, including all of the company’s founders, illustrated the complex nature of systems design and the challenges of launching a high-technology company in a fiercely competitive industry.

The on-line reprint is no substitute for the written article, with it's high-resolution pictures of the event. This, of course, is no substitute for the video of the actual event, whose link was published in the former Network Management article.

[Photos courtesy Oracle Magazine Jan/Feb 2013 Edition]

SPARC 25th Anniversary Highlights
If you do not have the time to watch the video of the creators of SPARC, on this 25th anniversary - Oracle published a highlights clip which is under 30 minutes. The highlights include current captains of industry, guiding SPARC today.

[Start of the SPARC timeline, courtesy Oracle Corporation]

Explore the SPARC Time Line
Diana included a link at the end of her article titled "Explore the SPARC Time Line" which leads to an amazing timeline of events surrounding SPARC, that no person interested in systems should miss!

[Oracle logo, courtesy Oracle Corporation]

Who is Diana Reichardt?

Diana Reichardt is a senior writer at Oracle. Besides this Jan/Feb issue in Oracle Magazine, she had published a pair of articles "Conversations with Oracle Innovators" through Oracle Corporate Communications with Rick Hetherington. 

Conversations with Oracle Innovators
Q&A with Rick Hetherington
By Diana Reichardt

Rick Hetherington, Oracle’s vice president of hardware development, manages a team of architects and performance analysts who design Oracle’s M- and T-series processors. Hetherington’s team tracks the performance of these designs in great detail, from the moment they are conceived until they are released as products. In this interview, Hetherington explains the design process and how the team’s day-to-day work is focused on what SPARC customers will have in their data centers three to five years from now.

Conversations with Oracle Innovators
SPARC T4 Deep Dive With Rick Hetherington
By Diana Reichardt

Rick Hetherington, Oracle’s vice president of hardware development, manages a team of architects and performance analysts who design Oracle’s M- and T-series processors. In this interview, Hetherington describes the technical details of the new SPARC T4 processor and explains why he thinks it is going to be an eye-opener for the industry.

Other fairly recent Oracle Magazine articles published by Diana include:

FEATURE
Complete Power
By Diana Reichardt
Oracle Magazine: May/June 2011

SPARC hardware and the Oracle Solaris operating system: High-performance engine for mission-critical apps

COMMENT: Analyst’s Corner
The SPARC/Oracle Solaris Platform Evolution
By Diana Reichardt
Oracle Magazine: May/June 2011

SPARC hardware and the Oracle Solaris operating system: High-performance engine for mission-critical apps

AT ORACLE: News
SPARC Torches Benchmark
By Diana Reichardt
Oracle Magazine: March/April 2011

Oracle’s new SPARC Supercluster, Oracle Exalogic Elastic Cloud T3-1B, and Oracle Solaris 11 break records and set new standards for performance and availability.

 Diana's writing is a pleasure to read.

Concluding Thoughts:
No modern computing professional should be without the background and understanding of the history of computing from this period of time. The future always has elements of the past hinting forward. SPARC is no different, in this case - many of the ideas in modern computing history would not have ever existed, had it not been for SPARC innovators. More innovations are sure to come.

Solaris Tab: SPARC White Paper Addendums

The Solaris Tab was recently updated with some white papers.

A new category was added for SPARC White Papers.

White papers were placed in date order, using shortened titles on the top, for easy access, while they were categorized with their full titles on the bottom according to topic.

Solaris Reference Material
2010-04 [PDF] Oracle's Sun SPARC T5120/T5220, T5140/T5240 Server Architecture
2010-04 [PDF] Oracle Sun SPARC Enterprise T5440 Server Architecture
2011-02 [PDF] Oracle's SPARC T3-4, T3-2, T3-1, and T3-1B Server Architecture
2012-02 [PDF] Oracle's SPARC T4-1, T4-2, T4-4, and T4-1B Server Architecture
2012-04 [PDF] How the SPARC T4 Processor Optimizes Throughput Capacity: A Case Study

SPARC White Papers
2010-04 [PDF] Oracle's Sun SPARC Enterprise T5120/T5220 and Oracle's Sun SPARC Enterprise T5140/T5240 Server Architecture
2010-04 [PDF] Oracle Sun SPARC Enterprise T5440 Server Architecture
2011-02 [PDF] Oracle's SPARC T3-4, SPARC T3-2, SPARC T3-1, and SPARC T3-1B Server Architecture
2012-02 [PDF] Oracle's SPARC T4-1, SPARC T4-2, SPARC T4-4, and SPARC T4-1B Server Architecture
2012-04 [PDF] How the SPARC T4 Processor Optimizes Throughput Capacity: A Case Study

POWER: Loss of Sony Playstation Platform

[Sony Playstation 3]

POWER: Loss of Sony PlayStation Platform

The Market Leaders:
Sun Microsystems introduced the RISC architecture SPARC in mid 1987. SPARC was registered as trademark of SPARC International, Inc., an organization established in 1989 to promote the SPARC architecture, manage SPARC trademarks, and provide conformance testing. Sun produced their systems on OpenFirmware, releasing it to the IEEE for standardization. SPARC found it's home on workstations, spread to servers, and even to embedded systems such as the Sun Ray in the late 1990's.


[IBM POWER5 Multi-Chip Module]

The Rise of POWER:
IBM produced the POWER architecture, an expensive multi-chip module which provided for outstanding performance at low volumes. Apple, IBM, Motorola, and decided October 2, 1991 to co-develop the POWER platform to expand the ecosystem for RISC processors under the AIM Alliance - to produce a single silicon chip high-volume RISC platform called PowerPC.

The Common Hardware Reference Platform (CHRP) for PowerPC was produced in 1994. CHRP platforms would require IEEE OpenFirmware (created by Sun) in 1995. To expand the POWER ecosystem, the "power.org" site was founded in 2004 by IBM, 15 other companies joined as members, nearly 20 years after SPARC. In 2006, the Sony Playstation released the PlayStation 3, under POWER architecture, expanding POWER into the gaming/entertainment sector.


SPARC Marches On:
In the 2000's, SPARC was no longer being used in the Sun Ray, but multiple vendors continue to produce SPARC processors. SPARC is an open specification, not a proprietary architecture, leaving multiple sources for this RISC processor. To continue to make this point, Sun Microsystems completely open-sourced their UltraSPARC T1 CPU in 2006, making SPARC it freely available for any manufacturer to produce - referring the architecture to OpenSPARC.

Fujitsu releases high-performance 8 core SPARC64 VIIIfx in 2009. The 16 core SPARC T3 was released by SUN/Oracle in 2010. Fujitsu releases another 8 core SPARC64 VII+ in 2010. Russia releases MCST-4R in 2010. Oracle released the 8 core SPARC T4 in 2011. Fujitsu is releasing SPARC64 IXfx in 2012. Oracle is projected to release the SPARC T5 in 2012.


The Decline of IBM POWER:
Apple abandoned PowerPC for Intel in 2006, leaving IBM POWER without a desktop partner. Sony is rumored to discontinue use of IBM POWER for their gaming consoles in the PlayStation 4, starting the decline of POWER in the gaming market. POWER7+ from IBM is now nearly a half-year late and IBM has still not delivered as of March 2012.

Solaris 11 Preview (Part 1)

Solaris 11 Preview (Part 1)

Timothy Prickett Morgan from The Register wrote an excellent article "Oracle previews Solaris 11, due in November" which spurred some contemplations.

Fowler said that the current Solaris 10 tops out at 512 threads and a few terabytes of addressable main memory.

This may have been what Fowler said, but I wonder how much of an impacts of threads and large memory really has on Solaris 10, today. For example, the T3-4, which was released some time back, already surpasses 512 threads, with Solaris 10 performing linearly.

It is therefore not a coincidence that last year's top-end Sparc T3-4 server, which had eight 16-core, 128-thread Sparc T3 processors topped out at four sockets.

This years top-end SPARC T4-4 server halved the cores, halved the threads, maintained throughput, so the T4 processor could have been extended to 8 sockets with additional threads being added over the T3-4 platform. This being said, I think it was a coincidence. I don't really think the number of sockets is a Solaris issue. The math just does not suggest this conclusion.

I suspect the decision to top-out at 4 sockets has more to do with chip design realities. The decision to extend the cross-bar to manage another bit from 8 cores to 16 cores was a massive undertaking in the T3. The decision to extend add the S3 core into the T4 was a massive undertaking. The decision to integrate the massive S3 infrastructure onto the massive T3 crossbar will require more space, requiring a process shrink, which will also add significant effort.

Why does a process shrink require significant effort, when you are just making everything smaller? The answer to this question is related to another question which is always asked, "now that this is smaller, how much can we bump up the clock rate"?

The answer to this question deals with the length of the longest wires in the chip after the shrink - they are significant clock rate limiting factors. Any correction requires re-routing the "long" wires. The re-routing, by massive computing systems, absorb immense quantities of time. The chip testing, when adding functionality, also requires immense quantities of time.

These quantities of time are limiting factors. A single bug or manufacturing defect may require the turning-off of a feature (to be emulated in software, a-la Intel Floating Point bug) or a re-design of a chip area, without impacting surrounding areas.

Solaris 10 and 2011 Roadmaps



The early 2011 roadmap indicates Solaris 10 will experience a release in 2011 as well as 2012 - and the market just experienced Solaris 10 Update 10 release, according to the timeline provided.


The late 2011 roadmap did not show the on-time 2011 Solaris 10 release or the projected 2012 release... but there is an indication of the next T processor being pulled into the same timeframe as the 2012 Solaris 10 release.

Doing the math, it seems the "T5-8" platform (if Oracle remains consistent with their naming conventions) may really increase the number of simultaneous threads, and one might suspect that the 2012 projected "Solaris 10 Update 11" release might probably support the larger number of total number of threads.

2010 T3-4: 16 cores * 8 threads * 4 sockets = 1024 threads
2011 T4-4: 08 cores * 8 threads * 4 sockets = 0512 threads
2012 T5-8: 16 cores * 8 threads * 8 sockets = 2048 threads

Conclusion:

The migration to Solaris 11 will probably take a long time. The market is pretty happy to see many Solaris 11 performance features being back-ported to Solaris 10, especially since Solaris 11 is not supported under older SPARC hardware. More on this in Part 2 of this series.

Oracle License Change: Add SPARC T4

(Oracle SPARC T4 micrograph)

Oracle License Change: Add SPARC T4

Abstract

Oracle licenses it's RDBMS by several factors, typically the Standard License (by socket) and an Enterprise License (by core scaling factor.) Occasionally, Oracle will change the core scaling factor, resulting in discounting or liability for the consumer.

The Platform

The SPARC CPU from Oracle is an implementation of the SPARC V9 open specification. There have been several series of chips based upon this implementation: T1, T2, T2+, and T3. The T1 & T2 are both single socket implementations, while the T2+ and T3 are a multi-socket implementation. Oracle has released on their roadmap that the SPARC T4 processor will be coming out shortly.

The Addition

The SPARC T4 has been added to the Oracle RDBMS "Processor-Core Factor Table".

Factor Vendor/Processor
0.25 SUN UltraSPARC T1 <1.4GHz
0.25 Oracle SPARC T3
0.50 SUN UltraSPARC T1 1.4GHz
0.50 SUN UltraSPARC T2+ Multicore
0.50 Fujitsu SPARC VII+
0.50 Oracle SPARC T4
0.75 SUN UltraSPARC IV, IV+, or earlier
0.75 Fujitsu SPARC64 VI, VII
0.75 SUN UltraSPARC T2

Note, Green is new. Oracle has added the T4 processor with a core factor of 0.50.

Impacts to Network Management Infrastructure

It appears that Oracle will be releasing SPARC T4 into production. Purchasing should be watched very closely during this transition period.

If there is the need for increased thread performance, the 8 core T4 may be leveraged instead of the 16 core T3, with no impact to Oracle licensing when databases require an RDBMS.

The UltraSPARC IV+ 21.GHz processors had some of the best single-threaded performance characteristics of any SPARC processor ever produced (albeit, the throughput pales in comparison to any of the newer generation of multicore SPARC systems.)

The Oracle SPARC T4 finally looks like a good candidate to replace those old SUN UltraSPARC IV+ systems, which are so highly cherished for their single thread performance. There is probably no better Network Managment platform to consider at this point in time.

Recent Links: 2011-05-29 until 2011-06-04

Recent Links: 2011-05-29 until 2011-06-04

Some interesting articles published related to network management platforms.

[htmlpdf] - 2011-06-03 - SPARC M8000/Oracle 11g Beats IBM POWER7 on TPC-H @1000GB Benchmark
[htmlpdf] - 2011-06-02 - Solaris installation on a SPARC T3 from a remote CDROM ISO
[htmlpdf] - 2011-03-25 - SPARC M9000/Oracle 11g Delivers World Record Single Server TPC-H @3000GB Result
[htmlpdf] - 2010-07-26 - Adding a hard drive for /export/home under ZFS
[htmlpdf] - 2010-02-01 - NFS Tuning for HPC Streaming Applications
[htmlpdf] - 2010-01-21 - Graphing Solaris Performance Stats with gnuplot

What do CoolThreads Cores & Crypto Engines Buy You?

(UltraSPARC T3 Micrograph)

What do CoolThreads Cores & Crypto Engines Buy You?

Misconception:
"SPARC T1...That CPU had a cryptographic accelerator in it. Later, the SPARC T2 improved things by implementing a Crypto engine in each of the 8 cores."

Reality:
The move from 1 to 8 was not with the Crypto units, but with the Floating Point Unit, when moving from the T1 to the T2 processor.

Evidence:
http://www.sun.com/blueprints/0306/819-5782.pdf
Page 5
"The eight MAUs, one for each core, are driven by the Niagara Crypto Provider (NCP) device driver in the Solaris 10 OS for both UltraSPARC T1 and T2 processors.
On systems with UltraSPARC T1 processors, NCP supports hardware assisted acceleration of RSA and DSA cryptographic operations. On systems with UltraSPARC T2 processors, NCP supports RSA, DSA, DH, and ECC cryptographic operations"

Summary:
Understanding the different members of the CoolThreads processing family could be

• UltraSPARC T1
  8 Integer, 1 Floating, 8 Crypto engines.
• UltraSPARC T2
  8 Integer, 8 Floating, 8 "enhanced" Crypto engines (with additional algorithms supported.)
• SPARC T3
  16 Integer, 16 Floaring, 16 "steroid enhanced" Crypto engines (with even more Crypto algorithms supported.)

The Crypto instructions in the new Intel chip was to assist in Crypto work, but the CPU cores have to work to process the data.

Contrast the Intel architecture to the T Series: the CoolThreads Crypto units are completely parallel... simply speaking, the CPU dump a pointer to the Crypto core to work on on a set of bytes to encrypt/decrypt, the Crypto core ends a message back to the CPU when it is done. The CPU can do real work during the time the parallel Crypto unit is operating.

This is pretty close to how it all works, considering that this layman did not design the CPU's.

Conclusion:
In total, for workloads that are heavily encrypted (databases, file systems, web servers, middleware, etc.) - the T processors are the processor of choice. It makes NO SENSE to buy CPU's without Crypto engines (i.e. Intel) where the central processing power that you are paying licensing points for has to burn those license points doing Crypto work instead of off-loading the work to 8 or 16 different crypto engines (for free) and then only pay your licensing for the work that the CPU is really doing for your applications.

Sun Developer Days for NY/NJ: 2010-Dec

Sun Developer Days for NY/NJ: 2010-Dec

Abstract
Isaac Rozenfeld from Oracle/Sun posted an agenda and materials from a 2-day tour of New York City and Bridgewater tour of Solaris Days.

Agenda
08:30 Registration & Breakfast
09:00 Welcome Back, Agenda – Isaac Rozenfeld [Audio] Focus on Financial Services - Ambreesh Khanna [Audio]
09:10 Solaris Networking Virtualization – Nicolas Droux [Audio]
10:00 Solaris Zones Update – Dan Price [Audio]
10:45 Image Packaging System – Bart Smaalders [Audio]
11:30 Platform Updates: x86 and SPARC – Sherry Moore [Audio]
12:15 Lunch, Isaac Rozenfeld's bonus session on running Solaris on top of the VirtualBox hypervisor [Audio]
01:00 Solaris Integration into Oracle – Damien Farnham [Audio]
01:45 Leaping Forward with Solaris Infiniband – David Brean [Audio]
02:30 Installation Experience Modernization – David Miner [Audio]
03:15 Oracle Enterprise Manager Ops Center – Mike Barrett [Audio]
04:00 Service Management Facility Architecture and Deployment – Liane Praza [Audio]
04:45 Q&A/Raffle

Executive Overview
Some of the important take-aways from a Network Management perspective.

10:00AM Solaris Zones Update by Dan Price

• Page 5 - Older Solaris 8 & Solaris 9 SPARC physical machine (p2v) can be vitualized, as well as Linux under Intel
• Page 8 - Security and Patch OS Updates can be made by merely migrating a zone containing an application from the old server to another server which had the patch applied
• Page 24 - p2v support virtualizing Solaris 8, Solaris 9 (now Solaris 10 from a Solaris 11 platform); v2v for moving a zone between physical machines
• Page 26 - Some common application support matrix where inquiries are constantly made
• Page 19 - New "zonestat" command for quickly seeing health of components across multiple zones simultaneously.

10:45AM - Image Packaging System by Bart Smaalders

• Pages 1-44 - Overview of the Solaris 11 Image Packaging System

11:30 AM - Platform Updates: x86 and SPARC by Sherry Moore

• Page 4 - New SPARC T3 Processor (16 cores) image and features
• Page 5 - I am tickled that Oracle used a SPARC diagram drawn by me (unfortunately they stretched it)
• Page 6 - Current generation systems: images and features
• 1:45PM - Leaping forward with Solaris Infiniband
• Page 16 - Infiniband usage in Solaris Virtualized Zones Diagram
• Page 30 - Important OS commands for Infiniband Fabric

2:30PM - Installation Experience Modernizations by David Miner

• Page 4 - Solaris 10 and Solaris 11 Comparisons (important: Jumpstart Replaced!)
• Page 5 - New Boot Environments based upon ZFS with "unlimited snapshots", breaking mirror with only one rollback is a thing of the past with Solaris 11
• Page 9 - New Automated Installer Diagram, to replace Jumpstart… following pages illustrate use cases!

4:00PM - Service Management Facility Architecture and Deployment

• Page 4 - Best Practices for deploying applicatons across networks
• Page 7 - Best Practices for deploying applications onto ZFS
• Page 9 - Software Support and Admin teams no longer require root or sudo with Solaris SMF for stop/start/restart
• Page 11 - Application layer firewalls bundled as a service
• Page 16 - Solaris 11 Image Packaging Sytem no longer uses scripts, but bundles into SMF
• Page 17 - Automatic Fault notifications through SMF via email & SNMP
• Page 19 - Best Practices of modern virtualized Solaris Application Deployment

CoolThreads UltraSPARC and SPARC Processors

[UltraSPARC T3 Micrograph]

CoolThreads UltraSPARC and SPARC Processors

Abstract:
Processor development takes an immense quantity of time, to architect a high-performance solution, and an uncanny vision of the future, to project market demand and acceptance. In 2005, Sun embarked on a bold path moving toward many cores and many threads per core. Since the purchase of Sun by Oracle, the internal SPARC road map from Sun had clarified.


[UltraSPARC T1 Micrograph]
Generation 1: UltraSPARC T1
A new family of SPARC processors was announced by Sun on 2005 November 14.

• Single die
• Single socket
  
• 64 bits
• 4, 6, 8 integer cores
• 4, 6, 8 crypto cores
  
• 4 threads/core
• 1 shared floating point core
• 1.0 GHz - 1.4 GHz clock speed
• 279 million transisters
• 378 mm2
• 90 nm CMOS (TI)
• 1 JBUS port
• 3 Megabyte Level 2 Cache
• 1 Integer ALU per Core
• ??? Memory Controllers
  
• 6 Stage Integer Pipeline per Core
• No embedded Ethernet into CPU
• Crypto Algorithms: ???
  

Platform designed as a front-end server for web server applications. With a massive number of cores, it was designed to provide web-tier performance similar to existing quad-socket systems leveraging a single socket.

To understand the ground-breaking advancement in this technology, most processors were single core, with an occasional dual core processor (with cores glued together through a more expensive process referred to as a multi-chip module, driving higher software licensing costs for those platforms.)


Generation 2: UltraSPARC T2
The next generation of the CoolThreads processor was announced by Sun on 2007 August.

• Single die
• Single Socket
  
• 64 bits
• 4, 6, 8 integer cores
• 4, 6, 8 crypto cores
  
• 4, 6, 8 floating point units
• 8 threads/core
• 1.2 GHz - 1.6 GHz clock speed
• 503 million transisters
• 342 mm2
• 65 nm CMOS (TI)
• 1 PCI Express port (1.0 x8)
• 4 Mageabyte Level 2 Cache
• 2 Integer ALU per Core
• 4x Dual Channel FBDIMM DDR2 Controllers
• 8 Stage Integer Pipeline per Core
• 2x 10 GigabitEthernet on-CPU ports
• Crypto Algorithms: DES, Triple DES, AES, RC4, SHA1, SHA256, MD5, RSA-2048, ECC, CRC32

This processor was designed for higher compute intensive requirements and incredibly efficient network capacity. Platform made an excellent front-end server for applications as well as Middleware, with the ability to do 10 Gigabit wire-speed encryption with virtually no CPU overhead.

Competitors started to build Single-Die dual-core CPU's with Quad-Core processors by gluing dual-core processors into a Multi-Chip Module.


[UltraSPARC T2 Micrograph]
Generation 3: UltraSPARC T2+
Sun quickly released the first CoolThreads SMP capable UltraSPARC T2+ in 2008 April.

• Single die
• 1-4 Sockets
  
• 64 bits
• 4, 6, 8 integer cores
• 4, 6, 8 crypto cores
  
• 4, 6, 8 floating point units
• 8 threads/core
• 1.2 GHz - 1.6 GHz clock speed
• 503 million transisters
• 342 mm2
• 65 nm CMOS (TI)
• 1 PCI Express port (1.0 x8)
• 4 Megabyte Level 2 Cache
• 2 Integer ALU per Core
• 2x? Dual Channel FBDIMM DDR2 Controllers
• 8? Stage Integer Pipeline per Core
• No embedded Ethernet into CPU
• Crypto Algorithms: DES, Triple DES, AES, RC4, SHA1, SHA256, MD5, RSA-2048, ECC, CRC32
  

This processor allowed the T processor series to move from the Tier 0 web engines and Middleware to Application tier. Architects started to understand the benefits of this platform entering the Database tier. This was the first Coolthreads processor to scale past 1 and up to 4 sockets.

By this time, competition really started to understand that Sun had properly predicted the future of computing. The drive toward single-die Quad-Core chips have started with Hex-Core Multi-Chip Modules being predicted.


Generation 4: SPARC T3
The market became nervous with Oracle purchasing Sun. The first Oracle branded CoolThreads SMP capable UltraSPARC T3 was launched in in 2010 September.

• Single die
• 1-4 Sockets
  
• 64 bits
• 16 integer cores
• 16 crypto cores
  
• 16 floating point units
• 8 threads/core
• 1.67 GHz clock speed
• ??? million transisters
  
• 377 mm2
• 40 nm
  
• 2x PCI Express port (2.0 x8)
• 6 Megabyte Level 2 Cache
• 2 Integer ALU per Core
• 4x DDR3 SDRAM Controllers
• 8? Stage Integer Pipeline per Core
• 2x 10 GigabitEthernet on-CPU ports
• Crypto Algorithms: DES, 3DES, AES, RC4, SHA1, SHA256/384/512, Kasumi, Galois Field, MD5, RSA to 2048 key, ECC, CRC32

This processor was more than what the market was anticipating from Oracle. This processor took all the features of the T2 and T2+ combined them into the new T3 with an increase in overall features. No longer did the market need to choose between multiple sockets or embedded 10 GigE interfaces - this chip has it all plus double the cores.

The market, immediately before this release, the competition was releasing single die hex-core and octal-core CPU's using multi-chip modules, by gluing them together. The T3 was a substantial upgrade over the competition by offering double the cores on a single die.


Generation 5: SPARC T4
Oracle indicated in December 2010 that they had thousands of these processors in the lab and predicted this processor will be released end of 2011.

After the announcement, a separate press release indicated processors will have a renovated core, for higher single threaded performance, but the socket will offer half the cores.

Most vendors are projected to have 8 core processors available (through Multi-Chip modules) by the time the T3 is released, but only the T4 should be on a single piece of silicon during this period.


[2010-12 SPARC Solaris Roadmap]
Generation 6: SPARC T5

Some details on the T5 were announced with the T4. Processors will use the renovated T4 core, with a 28nm process. This will return to 16 cores per socket again. This processor may be the first Coolthreads T processor able to scale from 1-8 processors. It is projected to appear in early 2013.

Some vendors are projecting to have 12 core processors on the market using Multi-Chip Module technology, but when the T5 is released, this should still be the market leader in 16 cores per socket.

Network Management Connection

Consolidating most network management stations in a globalized environment works very well with the Coolthreads T-Series processors. Consolidating multiple slower SPARC platforms onto single and double socket T series have worked well over the past half decade.

While most network management polling engines will scale linearly with these highly-threaded processors, there are some operations which are bound to single threads. These type of processes include event correlation, startup time, and syncronization after a discovery in a large managed topology.

The market will welcome the enhanced T4 processor core and the T5 processor, when it is released.

Scalable Highest Performing Clusters at Value Pricing

Scalable Highest Performing Clusters at Value Pricing

Abstract:
Oracle presented another milestone achievement in their 5 year SPARC/Solaris road map with Fujitsu. John Fowler stated: "Hardware without Software is a Door-Stop, Solaris is the gateway."

High-Level:
The following is a listing of my notes from the two sessions. The notes have been combined, with Larry Ellison outlining the high-level and John Fowler presenting the lower-level details. SPARC T3 making world-record benchmarks. New T3 based integrated products. Oracle's Sun/Fujitsu M-Series gets a speed bump. SPARC T4 is on the way.

Presentation Notes:


New TpmC Database OLTP Performance

• SPARC Top cluster performance
• SPARC Top cluster price-performance
• (turtle)
  HP Superdome Itanium 4 Million Transactions/Minute
• (stallion)
  IBM POWER7 Power 780 10 Million Transactions/Minute
  (DB2 clustered through custom applications)
• Uncomfortable 4 month for Oracle, when IBM broke the Oracle record
• (cheetah)
  Sun SPARC 30 Million Transactions/Minute
  (standard off-the-shelf Oracle running RAC)
• Oracle/Sun performance benchmark => ( IBM + HP ) x 2 !
• Sun to IBM Comparison:
  3x OLTP Throughput, 27% better Price/Performance, 3.2x faster response time
• Sun to HP Comparison:
  7.4x OLTP Throughput 66 Better Price/Performance, 24x compute density
• Sun Supercluster:
  108 sockets, 13.5 TB Memory, Infiniband 40 Gigabit link, 246 Terabytes Flash, 1.7 Petabytes Storage, 1 Quadrillion rows, 43 Trillion transactions per day, 0.5 sec avg response

New Gold Release

• Gold Standard Configurations are kept in the lab
• What the customer has, the support organization will have assembled in the lab
  
• Oracle, Sun, Cisco, IBM will all keep their releases and bug fixes in sync with releases

SPARC Exalogic Elastic Cloud

• Designed to run Middleware
  
• New T3 processor based
• 100% Oracle Middleware is Pure Java
• Tuned for Java and Oracle Fusion Middleware
• Load-balances with elasticity
• Ships Q1 2011
• T3-1B SPARC Compute Blades based
  30 Compute Servers, 16 cores/server, 3.8 TB RAM, 960 GB mirrored flash disks, 40 TB SAS Storage, 4 TB Read Cache, 72 GB Write Cache, 40 Gg/sec Infiniband, 10 GigE to Datacenter

SPARC Supercluster

• New T3 processor based and M processor based
• T3-2 = 2 nodes, 4 CPU's, 64 cores/512 threads, 0.5 TB RAM, 96 TB HDD ZFS, 1.7TB Write Flash, 4TB Read Flash, 40 Gbit Infiniband
• T3-4 = 3 nodes, 12 CPU's, 192 cores/1536 threads, 1.5 TB RAM, 144 TB HDD ZFS, 1.7TB Write Flash, 4TB Read Flash, 40 Gbit Infiniband
• M5000 = 2 nodes, 16 CPU's, 64 core/128 threads, 1 TB RAM, 144 TB HDD ZFS, 1.7TB Write Flash, 4TB Read Flash, 40 Gbit Infiniband

T3 Processor in production

• Releases already, performing in these platforms
  
• 1-4 processors in a platform
  
• 16 cores/socket, 8 threads/core
• 16 crypto-engines/socket
  
• More cores, threads, 10 GigE on-chip, more crypto engines

T4 Processor in the lab!

• Thousands under test in the lab, today
  
• To be released next year
• 1-4 processors
• 8 cores/socket, 8 threads/core
• faster per-thread execution

M3 Processor from Fujitsu

• SPARC VII+
• 1-64 SPARC64 VII+ Processors
• 4 cores, 2 threads/core
• Increased CPU frequency
• Double cache memory
• 2.4x performance of original SPARC64 VI processor
• VII+ boards will slot into the VI and VII board chassis
  

Flash Optimization
- Memory hierarchy with software awareness

Infiniband
- Appropriate for High Performance Computing
- Dramatically better performance than Ethernet for linking servers to servers & storage

New Solaris 11 Release

• Next Generation Networking
  re-engineered network stack
  low latency high bandwidth protocols
  virtualized
  

• Cores and Threads Scale
  Adaptive Thread and Memory Placement
  10,000's of core & threads
  thread observability with DTrace
  
  
• Memory Scale
  Dynamic optimization for large memory configs
  Advanced memory placement
  VM systems for 1000's TB memory configs
  
  
• I/O Performance
  Enhanced NUMA I/O framework
  Auto-Discovery of NUMA architecture
  I/O resources co-located with CPU for scale/performance
  
  
• Data Scale
  ZFS Massive storage for massive datasets
  
  
• Availability
  Boot times in seconds
  Minimized OS Install
  Risk-Free Updates with lightweight boot and robust package dependency
  Extensive Fault Management with Offline failing components
  Application Service Managemment with Restart failed applications and associated services quickly
  
  
• Security
  Secure by default
  Secure boot validated with onboard Trusted Platform Module
  Role Based Root Access
  Encrypted ZFS datasets
  Accelerated Encryption with hardware encryption support
  
  
• Trusted Solaris Extensions
  Dataset labels for explicit access rules
  IP labels for secure communication
  
  
• Virtualization
  Network Virtualization to add to Server and Storage Virtualization
  Network Virtualization includes Virtual NIC's and Virtual Switches
  

SPARC Supercluster Architecture

• Infiniband is 5x-8x faster than most common Enterprise interconnects
  Infiniband has been leveraged with storage and clustering in software
  
• Flash is faster than Rotating Media
  Integrated into the Memory AND Storage Hierarchy
  

SPARC 5 Year Roadmap

• SPARC T3 delvered in 2010
• SPARC VII+ delivered in 2010
• Solaris 11 and SPARC T4 to be delivered in 2011

Next generation of mission critical enterprise computing

• Engineer software with hardware products
• Deliver clusters for general purpose computing
• Enormous levels of scale
• Built in virtualization
• Built in Security
• Built in management tools
• Very Very high availability
• Tested with Oracle software
• Supported with Gold Level standard
• Customers spend less time integrating and start delivering services on systems engineered with highest performance components